The present disclosure relates to methods for processing microelectronic workpieces, and in particular, methods for creating patterned structures on the microelectronic workpieces.
Semiconductor device formation involves a series of manufacturing techniques related to the formation, patterning and removal of a number of layers of material on a substrate. To meet the physical and electrical specifications of current and next generation semiconductor devices, processing flows are being requested to improve various performance parameters, such as for example resistance-capacitance (RC) delay, power consumption, and reliability. For example, the integrity of ultra-low dielectric (k) (ULK) materials is one factor that impacts these characteristics for certain embodiments. Further, the integrity of the chamfer angle formed on the surfaces of features formed from ULK material (ULK features) that are included within the patterned structures is also an important specification for advanced fabrication. The ULK features can be easily damaged during the etching process by various species present in the plasma etch chemistry. This damage can detrimentally impact the k-value of the ULK material, thus having an adverse impact on the electrical performance of the resulting microelectronic devices. This damage can also impact the resulting profile and dimensions resulting from the etch processing for the microelectronic workpieces. In addition, the chamfer angle, particularly at smaller pitches, may also decrease and/or become rounded, which can further degrade the electrical performance and reliability of the resulting microelectronic devices being manufactured.
FIGS. 1A-D (Prior Art) provide example embodiments for a traditional process flow, such as a dual Damascene process flow, where ULK materials are often damaged in a plasma etch for forming trenches and one or more vias within a patterned structure. Looking first to FIG. 1A (Prior Art), an embodiment 100 for a patterned structure is shown that includes a ULK material layer 116. In particular, multiple electrical material layers are formed in a substrate 120. A protective liner 118 is formed to cover the substrate 120 and contact regions 122. The ULK material layer 116 is formed on the protective liner 118. A hard mask (HM) layer 114 is formed on top of the ULK material layer 116. A contact layer 112 and a second hard mask (HM) layer 110 are formed and patterned on top of the HM layer 114. An organic layer 108 is formed on top of the patterned layers 110/112/114 and fills in the patterned layers 110/112. A passivation layer 106 and anti-reflective coating (ARC) layer 104 are formed on top of the organic layer 108, respectively. Finally, a photoresist (PR) layer 102 is formed on top of the ARC and passivation layers 104/106, and PR layer 102 has been patterned to form openings 124. It is noted that additional (or fewer) process flow steps could also be included, for example, as part of a dual Damascene process flow.
It is noted that the protective liner 118 can be, for example, one or more of the following materials including but not limited to SiN, SiOx, SiC, nitrogen-doped silicon, metal oxides, metal nitrides, metal, NBLoK (nitrogen barrier low-k material), silicon carbide nitride (SiCN), and/or other desired protective liner materials. The ULK material layer 116 can be, for example, one or more of the following materials including but not limited to SiCOH, dense SiCOH, porous SiCOH, other porous dielectric materials, and/or other ULK materials. The HM layer 114 can be, for example, one or more of the following materials including but not limited to TEOS (tetraethyl orthosilicate), silicon oxide (SiOx), low temperature silicon oxide, silicon nitride (SiN), sacrificial SiN, SiCOH, silicon oxynitride (SiON), and/or other hard mask materials. The contact layer 112 can be, for example, one or more of the following materials including but not limited to metal nitrides including titanium nitride (TiN), metal oxides, and/or other metal contact materials. The second HM layer 110 can be, for example, similar materials as used for the HM layer 114. The organic layer 108 can be, for example, one or more of the following materials including but not limited to OPL (organic planarizing layer), SOH, SOC, and/or other organic materials. The passivation layer 106 can be, for example, one or more of the following materials including but not limited to an amorphous silicon oxynitride (SiON) film, SiARC, SOG (spin on glass), low temperature oxide, silicon nitride, silicon oxide, silicon oxynitride, TEOS, and/or other passivation materials. The ARC layer 104 can be, for example, one or more of the following materials including but not limited to a silicon-based ARC material, a titanium-based ARC material, a BARC (bottom anti-reflective coating) material, similar materials used for the organic layer 108, and/or other ARC materials. The PR layer 102 can be, for example, a positive photoresist material or a negative photoresist. It is again noted that these are provided as example materials, and additional and/or different materials could also be used.
FIG. 1B (Prior Art) shows an embodiment 130 for the patterned structure once vias 132 have been formed within the patterned structure. The vias 132 extend at least partially through the ULK layer 116. For certain embodiments, the vias 132 can land on top of the protective liner 118 or extend partially into the protective liner 118. In addition, the passivation layer 106, the ARC layer 104, and the PR layer 102 have been removed. For the formation of vias 132, a plasma etch including standard dielectric and organic etch process steps can be used, and this plasma etch can include plasma containing fluorocarbons, oxygen, nitrogen, hydrogen, argon, and/or other gases. For example, a fluorine and carbon plasma dry etch can be used. In addition, this plasma etch can be done in a few steps with different discharged plasmas for directionally etching the passivation layer 106 and the ARC layer 104, which are then subsequently removed after the partial via formation to expose organic layer 108. Other variations could also be implemented.
FIG. 1C (Prior Art) shows an embodiment 140 for the patterned structure after the organic layer 108 has been removed. This removal of the organic layer 108 exposes the structure 142 that includes vias 132 that are adjacent the ULK feature 158. For removal of the organic layer 108, a standard ash process can be used to strip the organic layer 108, such as for example, one or more oxide and carbon plasma dry etch steps. For example, standard ash steps can be used including but not limited to plasma etches containing oxygen, carbon dioxide, carbon monoxide, nitrogen, hydrogen, methane, argon, and/or other gases. This ash process step could be also be performed by an ex-situ asher apparatus or systems. Other variations could also be implemented.
FIG. 1D (Prior Art) shows an embodiment 150 for the patterned structure after trenches 152 have been formed. As depicted, vias 132 have also been etched through the remaining portion of the protective liner 118 and into the contact regions 156 on either side of the resulting ULK feature 158. Chamfered corners 154 have also been formed on the edges of the ULK feature 158. These chamfered corners 154 are susceptible to damage during the etch processes that remove the organic layer 108 and produce the trenches 152. For the trench etch, a fluorine and carbon plasma etch can be used, and this plasma etch can include plasma containing fluorocarbons, oxygen, nitrogen, argon, hydrogen, methane, and/or other gases. In addition, this plasma etch can be done in a few steps with different discharged plasmas for directional etching. Other variations could also be implemented.
For traditional back end-of-line (BEOL) dual Damascene structure integration all-in-one-etch flow as shown in part with respect to FIGS. 1A-D (Prior Art), the chamfered corners 154 are extensively exposed to plasma etching by radical/ion bombardment during the trench etch process that forms the trenches 152 shown in FIG. 1D (Prior Art). For example, the chamfered corners 154 for the ULK feature 158 are often etched at a much faster rate than the ULK material at other areas of ULK feature 158, resulting in rounded and chopped structures at the chamfered corners 154. In addition, the ULK feature 158 can be damaged by the plasma organic strip etch processing that removes the organic layer 108 shown in FIG. 1B (Prior Art).
After the trench etch processing and the typical wet clean process that follows, the dual Damascene structure including the ULK feature 158 is typically metalized (e.g., using copper) by adding one or more metal layers through a metallization process. Due to the rounded and chopped chamfered corners 154 resulting from the trench etch process, the distance between the metal layer (e.g., copper) and the underneath contact becomes much shorter, which can cause undesired electrical shorts to occur thereby degrading performance and lifetime. As such, it is desirable to reduce the damage to the ULK feature 158.